Iddq Testing of a Cmos First Order Sigma-delta Modulator of an 8-bit Oversampling Adc

ii ACKNOWLEDGEMENTS I would like to dedicate my work to my parents, Mr. and Mrs. Chamkura Padma Rao, my brother Aravind and my sister Jyothi, for their constant prayers and encouragement throughout my life. I am very grateful to my advisor Dr. A. Srivastava for his guidance, patience and understanding throughout this work. His suggestions, discussions and constant encouragement have helped me to get a deep insight in the field of VLSI design. I would like to thank Dr. Suresh Rai and Dr. Martin Feldman for being a part of my committee. I am very thankful to Electrical Engineering Department, for supporting me financially during my stay at LSU. I am very thankful to my friends Aluri, Harish and Chandra for their extensive help throught my graduate studies at LSU. I take this opportunity to thank my friends Vijay, Sandeep, Uday, Pavan and Prabhu for their help and encouragement at times I needed them. I would also like to thank all my friends here who made my stay at LSU an enjoyable and a memorable one. Last of all I thank GOD for keeping me in good health and spirits throughout my stay at LSU.